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3#include <telkin/Preprocessor.h>
8#if defined(TELKIN_NO_REGISTERS) || defined(TELKIN_REGISTERS)
9#error The TELKIN_REGISTERS macro system is deprecated. Instead, simply include telkin/DefineRegisters.h or telkin/UndefineRegisters.h throughout your file as needed.
12#define tAssembly(...) __attribute__((naked)) __attribute__((__noinline__)) { __asm__ volatile (PP_STR_VAL(__VA_ARGS__)); }
15 #define tRegSave __attribute__(())
17 #define tRegSave __attribute__((preserve_all))
54 return (
u32(
op) << 26)
55 | (
u32(
li & 0xFF'FF'FF) << 2)
62 return (
u32(
op) << 26)
63 | (
u32(
bo & 0x1F) << 21)
64 | (
u32(
bi & 0x1F) << 16)
65 | (
u32(
bd & 0x3FFF) << 2)
72 return (
u32(
op) << 26)
74 | (
u32(
ra & 0x1F) << 16)
80 return (
u32(
op) << 26)
82 | (
u32(
ra & 0x1F) << 16)
83 | (
u32(
rb & 0x1F) << 11)
84 | (
u32(
xo & 0x3FF) << 1)
90 return (
u32(
op) << 26)
91 | (
u32(
rt & 0x1F) << 21)
92 | (
u32(
ra & 0x1F) << 16)
93 | (
u32(
rb & 0x1F) << 11)
95 | (
u32(
xo & 0x1FF) << 1)
101 return (
u32(
op) << 26)
106 | (
u32(
xo & 0x1F) << 1)
112 return (
u32(
op) << 26)
113 | (
u32(
rs & 0x1F) << 21)
114 | (
u32(
ra & 0x1F) << 16)
115 | (
u32(
sh & 0x1F) << 11)
116 | (
u32(
mb & 0x1F) << 6)
117 | (
u32(
me & 0x1F) << 1)
123 return (
u32(
op) << 26)
124 | (
u32(
bt & 0x1F) << 21)
125 | (
u32(
ba & 0x1F) << 16)
126 | (
u32(
bb & 0x1F) << 11)
127 | (
u32(
xo & 0x3FF) << 1)
138 return (
u32(
op) << 26)
139 | (
u32(
rs & 0x1F) << 21)
141 | (
u32(
xo & 0x3FF) << 1);
146 return (
u32(
op) << 26)
149 | (
u32(
xo & 0x3FF) << 1)
155 return (
u32(
op) << 26)
157 | (
u32(
ra & 0x1F) << 16)
159 | (
u32(
i & 0x7) << 12)
165 return (
u32(4) << 26)
167 | (
u32(
ra & 0x1F) << 16)
168 | (
u32(
rb & 0x1F) << 11)
170 | (
u32(
i & 0x7) << 7)
171 | (
u32(
xo & 0x3F) << 1);
281 consteval u32
yield() {
return 0x7F7BDB78u; }
282 consteval u32
mdoio() {
return 0x7FBDEB78u; }
283 consteval u32
mdoom() {
return 0x7FDEF378u; }
287 consteval u32
rlwinm(
R ra,
R rs,
u8 sh,
u8 mb,
u8 me,
bool rc =
false) {
return internal::
M_form(21,
u8(
rs),
u8(
ra),
sh,
mb,
me,
rc); }
288 consteval u32
rlwnm(
R ra,
R rs,
R rb,
u8 mb,
u8 me,
bool rc =
false) {
return internal::
M_form(23,
u8(
rs),
u8(
ra),
u8(
rb),
mb,
me,
rc); }
289 consteval u32
rlwimi(
R ra,
R rs,
u8 sh,
u8 mb,
u8 me,
bool rc =
false) {
return internal::
M_form(20,
u8(
rs),
u8(
ra),
sh,
mb,
me,
rc); }
316 consteval u32
fmadd(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(63,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 29,
rc); }
317 consteval u32
fmadds(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(59,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 29,
rc); }
318 consteval u32
fmsub(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(63,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 28,
rc); }
319 consteval u32
fmsubs(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(59,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 28,
rc); }
320 consteval u32
fnmadd(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(63,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 31,
rc); }
321 consteval u32
fnmadds(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(59,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 31,
rc); }
322 consteval u32
fnmsub(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(63,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 30,
rc); }
323 consteval u32
fnmsubs(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(59,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 30,
rc); }
442 consteval u32
bdnzlr() {
return 0x4E000020u; }
445 consteval u32
bdzlr() {
return 0x4E400020u; }
452 consteval u32
bdnzlrl() {
return 0x4E000021u; }
455 consteval u32
bdzlrl() {
return 0x4E400021u; }
512 consteval u32
blr() {
return 0x4E800020u; }
513 consteval u32
bctr() {
return 0x4E800420u; }
514 consteval u32
blrl() {
return 0x4E800021u; }
515 consteval u32
bctrl() {
return 0x4E800421u; }
590 consteval u32
sc() {
return 0x44000002u; }
591 consteval u32
rfi() {
return 0x4C000064u; }
610 consteval u32
trap() {
return 0x7FE00008u; }
693 consteval u32
fsel(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(63,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 23,
rc); }
711 consteval u32
ps_madd(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 29,
rc); }
712 consteval u32
ps_msub(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 28,
rc); }
713 consteval u32
ps_nmadd(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 31,
rc); }
714 consteval u32
ps_nmsub(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 30,
rc); }
715 consteval u32
ps_sel(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 23,
rc); }
723 consteval u32
ps_madds0(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 14,
rc); }
724 consteval u32
ps_madds1(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 15,
rc); }
725 consteval u32
ps_sum0(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 10,
rc); }
726 consteval u32
ps_sum1(
F fd,
F fa,
F fc,
F fb,
bool rc =
false) {
return internal::
A_form(4,
u8(
fd),
u8(
fa),
u8(
fb),
u8(
fc), 11,
rc); }
739#define tSaveVolatileRegisters
759#define tRestoreVolatileRegisters
FPR F
Definition Assembly.h:49
GPR
Definition Assembly.h:22
@ r12
Definition Assembly.h:25
@ r27
Definition Assembly.h:28
@ sp
Definition Assembly.h:31
@ r0
Definition Assembly.h:23
@ r16
Definition Assembly.h:26
@ r2
Definition Assembly.h:23
@ r30
Definition Assembly.h:29
@ r13
Definition Assembly.h:25
@ r8
Definition Assembly.h:24
@ r15
Definition Assembly.h:26
@ r29
Definition Assembly.h:28
@ r6
Definition Assembly.h:24
@ r21
Definition Assembly.h:27
@ r26
Definition Assembly.h:28
@ r23
Definition Assembly.h:27
@ r1
Definition Assembly.h:23
@ r11
Definition Assembly.h:25
@ r3
Definition Assembly.h:23
@ r10
Definition Assembly.h:25
@ r25
Definition Assembly.h:28
@ r4
Definition Assembly.h:23
@ r22
Definition Assembly.h:27
@ r19
Definition Assembly.h:26
@ r17
Definition Assembly.h:26
@ r24
Definition Assembly.h:27
@ r31
Definition Assembly.h:29
@ r7
Definition Assembly.h:24
@ r18
Definition Assembly.h:26
@ r9
Definition Assembly.h:24
@ r20
Definition Assembly.h:27
@ r5
Definition Assembly.h:24
@ r14
Definition Assembly.h:25
@ r28
Definition Assembly.h:28
GPR R
Definition Assembly.h:48
FPR
Definition Assembly.h:34
@ f24
Definition Assembly.h:39
@ f19
Definition Assembly.h:38
@ f21
Definition Assembly.h:39
@ f4
Definition Assembly.h:35
@ f28
Definition Assembly.h:40
@ f25
Definition Assembly.h:40
@ f14
Definition Assembly.h:37
@ f6
Definition Assembly.h:36
@ f27
Definition Assembly.h:40
@ f11
Definition Assembly.h:37
@ f31
Definition Assembly.h:41
@ f9
Definition Assembly.h:36
@ f3
Definition Assembly.h:35
@ f12
Definition Assembly.h:37
@ f15
Definition Assembly.h:38
@ f23
Definition Assembly.h:39
@ f5
Definition Assembly.h:36
@ f29
Definition Assembly.h:40
@ f22
Definition Assembly.h:39
@ f8
Definition Assembly.h:36
@ f16
Definition Assembly.h:38
@ f26
Definition Assembly.h:40
@ f2
Definition Assembly.h:35
@ f7
Definition Assembly.h:36
@ f20
Definition Assembly.h:39
@ f1
Definition Assembly.h:35
@ f10
Definition Assembly.h:37
@ f17
Definition Assembly.h:38
@ f13
Definition Assembly.h:37
@ f30
Definition Assembly.h:41
@ f0
Definition Assembly.h:35
@ f18
Definition Assembly.h:38
CR
Definition Assembly.h:44
@ cr4
Definition Assembly.h:45
@ cr5
Definition Assembly.h:45
@ cr1
Definition Assembly.h:45
@ cr2
Definition Assembly.h:45
@ cr3
Definition Assembly.h:45
@ cr0
Definition Assembly.h:45
@ cr7
Definition Assembly.h:45
@ cr6
Definition Assembly.h:45
u64(*)() getTitleID_t
Definition Mod.h:16