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Assembly.h File Reference

Go to the source code of this file.

Namespaces

namespace  tk
namespace  tk::ppc
namespace  tk::ppc::internal

Macros

#define TELKIN_REGISTERS_WARNING()
#define tAssembly(...)
#define tRegSave   __attribute__((preserve_all))
#define tSaveVolatileRegisters
#define tRestoreVolatileRegisters
#define tSaveLR
#define tRestoreLR

Typedefs

using tk::ppc::R = GPR

Enumerations

enum class  tk::ppc::GPR : u8 {
  tk::ppc::r0 , tk::ppc::r1 , tk::ppc::r2 , tk::ppc::r3 ,
  tk::ppc::r4 , tk::ppc::r5 , tk::ppc::r6 , tk::ppc::r7 ,
  tk::ppc::r8 , tk::ppc::r9 , tk::ppc::r10 , tk::ppc::r11 ,
  tk::ppc::r12 , tk::ppc::r13 , tk::ppc::r14 , tk::ppc::r15 ,
  tk::ppc::r16 , tk::ppc::r17 , tk::ppc::r18 , tk::ppc::r19 ,
  tk::ppc::r20 , tk::ppc::r21 , tk::ppc::r22 , tk::ppc::r23 ,
  tk::ppc::r24 , tk::ppc::r25 , tk::ppc::r26 , tk::ppc::r27 ,
  tk::ppc::r28 , tk::ppc::r29 , tk::ppc::r30 , tk::ppc::r31 ,
  tk::ppc::sp = r1
}
enum class  tk::ppc::FPR : u8 {
  tk::ppc::f0 , tk::ppc::f1 , tk::ppc::f2 , tk::ppc::f3 ,
  tk::ppc::f4 , tk::ppc::f5 , tk::ppc::f6 , tk::ppc::f7 ,
  tk::ppc::f8 , tk::ppc::f9 , tk::ppc::f10 , tk::ppc::f11 ,
  tk::ppc::f12 , tk::ppc::f13 , tk::ppc::f14 , tk::ppc::f15 ,
  tk::ppc::f16 , tk::ppc::f17 , tk::ppc::f18 , tk::ppc::f19 ,
  tk::ppc::f20 , tk::ppc::f21 , tk::ppc::f22 , tk::ppc::f23 ,
  tk::ppc::f24 , tk::ppc::f25 , tk::ppc::f26 , tk::ppc::f27 ,
  tk::ppc::f28 , tk::ppc::f29 , tk::ppc::f30 , tk::ppc::f31
}
enum class  tk::ppc::CR : u8 {
  tk::ppc::cr0 , tk::ppc::cr1 , tk::ppc::cr2 , tk::ppc::cr3 ,
  tk::ppc::cr4 , tk::ppc::cr5 , tk::ppc::cr6 , tk::ppc::cr7
}

Functions

consteval u32 tk::ppc::internal::I_form (u8 op, s32 li, bool aa, bool lk)
consteval u32 tk::ppc::internal::B_form (u8 op, u8 bo, u8 bi, s16 bd, bool aa, bool lk)
consteval u32 tk::ppc::internal::D_form (u8 op, u8 rsd, u8 ra, s16 d)
consteval u32 tk::ppc::internal::X_form (u8 op, u8 rsd, u8 ra, u8 rb, u16 xo, bool rc)
consteval u32 tk::ppc::internal::XO_form (u8 op, u8 rt, u8 ra, u8 rb, bool oe, u16 xo, bool rc)
consteval u32 tk::ppc::internal::A_form (u8 op, u8 frt, u8 fra, u8 frb, u8 frc, u8 xo, bool rc)
consteval u32 tk::ppc::internal::M_form (u8 op, u8 rs, u8 ra, u8 sh, u8 mb, u8 me, bool rc)
consteval u8 tk::ppc::internal::cr_field (CR cr)
consteval u32 tk::ppc::addi (R rt, R ra, s16 si)
consteval u32 tk::ppc::addis (R rt, R ra, s16 si)
consteval u32 tk::ppc::add (R rt, R ra, R rb, bool rc=false)
consteval u32 tk::ppc::mullw (R rt, R ra, R rb, bool rc=false)
consteval u32 tk::ppc::lwz (R rt, R ra, s16 d)
consteval u32 tk::ppc::stw (R rs, R ra, s16 d)
consteval u32 tk::ppc::stwu (R rs, R ra, s16 d)
consteval u32 tk::ppc::lbz (R rt, R ra, s16 d)
consteval u32 tk::ppc::stb (R rs, R ra, s16 d)
consteval u32 tk::ppc::ori (R ra, R rs, u16 ui)
consteval u32 tk::ppc::oris (R ra, R rs, u16 ui)
consteval u32 tk::ppc::xori (R ra, R rs, u16 ui)
consteval u32 tk::ppc::andi (R ra, R rs, u16 ui)
consteval u32 tk::ppc::andr (R ra, R rs, R rb, bool rc=false)
consteval u32 tk::ppc::orr (R ra, R rs, R rb, bool rc=false)
consteval u32 tk::ppc::xorr (R ra, R rs, R rb, bool rc=false)
consteval u32 tk::ppc::norr (R ra, R rs, R rb, bool rc=false)
consteval u32 tk::ppc::mr (R ra, R rb)
consteval u32 tk::ppc::cmpw (R ra, R rb, CR cr=CR::cr0)
consteval u32 tk::ppc::cmpwi (R ra, s16 simm, CR cr=CR::cr0)
consteval u32 tk::ppc::cmplw (R ra, R rb, CR cr=CR::cr0)
consteval u32 tk::ppc::cmplwi (R ra, u16 uimm, CR cr=CR::cr0)
consteval u32 tk::ppc::li (R rt, s16 si)
consteval u32 tk::ppc::lis (R rt, s16 si)
consteval u32 tk::ppc::bc (u8 bo, u8 bi, s16 byte_offset)
consteval u32 tk::ppc::blt (s16 offset)
consteval u32 tk::ppc::bgt (s16 offset)
consteval u32 tk::ppc::beq (s16 offset)
consteval u32 tk::ppc::bne (s16 offset)
consteval u32 tk::ppc::rlwinm (R ra, R rs, u8 sh, u8 mb, u8 me, bool rc=false)
consteval u32 tk::ppc::slw (R ra, R rs, R rb, bool rc=false)
consteval u32 tk::ppc::srw (R ra, R rs, R rb, bool rc=false)
consteval u32 tk::ppc::sraw (R ra, R rs, R rb, bool rc=false)
consteval u32 tk::ppc::srawi (R ra, R rs, u8 sh, bool rc=false)
consteval u32 tk::ppc::b (s32 relative)
consteval u32 tk::ppc::bl (s32 relative)
consteval u32 tk::ppc::blr ()
consteval u32 tk::ppc::nop ()
consteval u32 tk::ppc::mfspr (R rt, u16 spr)
consteval u32 tk::ppc::mtspr (u16 spr, R rs)
consteval u32 tk::ppc::mflr (R rt)
consteval u32 tk::ppc::mtlr (R rs)

Macro Definition Documentation

◆ TELKIN_REGISTERS_WARNING

#define TELKIN_REGISTERS_WARNING ( )
Value:
_Pragma("message \"WARNING: TELKIN_REGISTERS was not defined. It is recommended to globally define TELKIN_NO_REGISTERS if this was intentional\"")

◆ tAssembly

#define tAssembly ( ...)
Value:
__attribute__((naked)) __attribute__((__noinline__)) { __asm__ volatile (PP_STR_VAL(__VA_ARGS__)); }
#define TELKIN_REGISTERS_WARNING()
Definition Assembly.h:11
#define PP_STR_VAL(...)
Definition Preprocessor.h:16

◆ tRegSave

#define tRegSave   __attribute__((preserve_all))

◆ tSaveVolatileRegisters

#define tSaveVolatileRegisters
Value:
stwu r1, -0x3C(r1); \
stw r0, 0x08(r1); \
stw r3, 0x0C(r1); \
stw r4, 0x10(r1); \
stw r5, 0x14(r1); \
stw r6, 0x18(r1); \
stw r7, 0x1C(r1); \
stw r8, 0x20(r1); \
stw r9, 0x24(r1); \
stw r10, 0x28(r1); \
stw r11, 0x2C(r1); \
stw r12, 0x30(r1); \
mfcr r0; \
stw r0, 0x34(r1); \
mfctr r0; \
stw r0, 0x38(r1); \
mflr r0; \
stw r0, 0x40(r1)
#define r12
Definition DefineRegisters.h:16
#define r9
Definition DefineRegisters.h:13
#define r8
Definition DefineRegisters.h:12
#define r6
Definition DefineRegisters.h:10
#define r1
Definition DefineRegisters.h:4
#define r7
Definition DefineRegisters.h:11
#define r11
Definition DefineRegisters.h:15
#define r4
Definition DefineRegisters.h:8
#define r10
Definition DefineRegisters.h:14
#define r3
Definition DefineRegisters.h:7
#define r5
Definition DefineRegisters.h:9
#define r0
Definition DefineRegisters.h:3

◆ tRestoreVolatileRegisters

#define tRestoreVolatileRegisters
Value:
lwz r0, 0x38(r1); \
mtctr r0; \
lwz r0, 0x34(r1); \
mtcr r0; \
lwz r0, 0x40(r1); \
mtlr r0; \
lwz r0, 0x08(r1); \
lwz r3, 0x0C(r1); \
lwz r4, 0x10(r1); \
lwz r5, 0x14(r1); \
lwz r6, 0x18(r1); \
lwz r7, 0x1C(r1); \
lwz r8, 0x20(r1); \
lwz r9, 0x24(r1); \
lwz r10, 0x28(r1); \
lwz r11, 0x2C(r1); \
lwz r12, 0x30(r1); \
addi r1, r1, 0x3C

◆ tSaveLR

#define tSaveLR
Value:
stwu r1, -0x10(r1); \
mflr r2; \
stw r2, 0x14(r1)
#define r2
Definition DefineRegisters.h:6

◆ tRestoreLR

#define tRestoreLR
Value:
lwz r2, 0x14(r1); \
mtlr r2; \
addi r1, r1, 0x10